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发表于 2024-8-20 15:06:08
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Yes, it is a hybrid HW/SW solution.
The SW overhead is modest, just 32 times a second it captures the 2 timer registers and exits.
The SW jitter on the interrupt should be well below the IRC oscillator drift/jitter and if you want to preserve long term drift, you can read and add the timer values and never clear them.
I still hope to find a similar function like C8051F411 to capture the external clock, which can easily know the internal frequency accurately within a counting cycle and keep it close enough to the measurement period.
yes, STC are not great at cross domain capture, (or indeed much capture at all) so a pure hardware capture is not supported.
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