stc15w4k56s4存在弱上拉电平的问题
因为这次本产品使用的模块不一样，没有使能引脚，在没有任何输出的情况下出现了pwm3输出引脚P2.1出现了拉低电平输出0.87v的问题，问ai说这个是内部存在的上拉电阻导致的，请问这个如何避免这个问题的影响？这边代码配置如下：/******************************/
//8A系列增强型PWM
/******************************/
void PWM_kuo_zan_init() //特殊功能PWM直接操作输出
{
PWM2 =0;
PWM3 =0;
PWM4 =0;
PWM5 =0;
PWM6 =0;
PWM7 =0;
P0M0 &= ~0xc0;
P0M1 &= ~0xc0;
P0 &= ~0xc0; //设置P0.6/.P0.7电平
P2M0 &= ~0x0e;
P2M1 &= ~0x0e;
P2 &= ~0x0e; //设置P2.1/P2.2/P2.3电平
P3M0 &= ~0x80;
P3M1 &= ~0x80;
P3 &= ~0x80; //设置P3.7电平
P_SW2 |= 0x80;
// P2M0 |= 0x0E;// P2.1 P2.2 P2.3 → M0=1
//P2M1 &= ~0x0E; // P2.1 P2.2 P2.3 → M1=0
PWMCFG = 0x00; //配置PWM的输出初始电平为低电平
PWMCKS = 0x00; //选择PWM的时钟为Fosc/(0+1)
PWMCKS = 0x08; // PWM时钟为系统时钟
PWMC = 0xff; //设置PWM周期为ffH个PWM时钟
/*PWM0T1= 0x0100; //在计数值为100H地方输出低电平
PWM0T2= 0x0500; //在计数值为500H地方输出高电平
PWM0CR= 0x00; //使能PWM0输出
PWM1T1= 0x0100;
PWM1T2= 0x0171;
PWM1CR= 0x00; */
PWM2T1= 1;
PWM2T2= 0;
PWM2CR= 0x00; //PWM2输出到P3.7
PWM3T1= 1;
PWM3T2= 0;
PWM3CR= 0x00; //PWM3输出到P2.1
PWM4T1= 1;
PWM4T2= 0;
PWM4CR = 0x00; //PWM4输出到P2.2
PWM5T1= 1;
PWM5T2= 0;
PWM5CR = 0x00; //PWM5输出到P2.3
PWM6T1= 1;
PWM6T2= 0;
PWM6CR = 0x00; //PWM6输出到P1.6
PWM7T1= 1;
PWM7T2= 0;
PWM7CR = 0x00; //PWM7输出到P1.7
PWMCFG = 0x00; //配置PWM的输出初始电平
PWMCR = 0x3f; //使能PWM信号输出
PWMCR |= 0x80; //使能PWM模块
P_SW2&= ~0x80;
}
void pwm2(unsigned short Wide)
{
if (Wide == 0)
{
PWMCR &= ~0x01;
PWM2 = 0;
}
else if (Wide == CYCLE)
{
PWMCR &= ~0x01;
PWM2 = 1;
}
else
{
P_SW2 |= 0x80;
PWM2T1 = Wide;
P_SW2 &= ~0x80;
PWMCR |= 0x01;
}
}
void pwm3(unsigned short Wide)
{
if (Wide == 0)
{
PWMCR &= ~0x02;
PWM3 = 0;
}
else if (Wide >= CYCLE)
{
PWMCR &= ~0x02;
PWM3 = 1;
}
else
{
P_SW2 |= 0x80;
PWM3T1 = Wide;
P_SW2 &= ~0x80;
PWMCR |= 0x02;
}
}
void pwm4(unsigned short Wide)
{
if (Wide == 0)
{
PWMCR &= ~0x04;
PWM4 = 0;
}
else if (Wide == CYCLE)
{
PWMCR &= ~0x04;
PWM4 = 1;
}
else
{
P_SW2 |= 0x80;
PWM4T1 = Wide;
P_SW2 &= ~0x80;
PWMCR |= 0x04;
}
}
void pwm5(unsigned short Wide)
{
if (Wide == 0)
{
PWMCR &= ~0x08;
PWM5 = 0;
}
else if (Wide == CYCLE)
{
PWMCR &= ~0x08;
PWM5 = 1;
}
else
{
P_SW2 |= 0x80;
PWM5T1 = Wide;
P_SW2 &= ~0x80;
PWMCR |= 0x08;
}
}
void IO_init()
{
P0M0 = 0x00;
P0M1 = 0x00;
P1M0 = 0x82;
P1M1 = 0x1D;
P2M0 = 0xff;
P2M1 = 0x00;
P3M0 = 0x60;
P3M1 = 0x00;
P4M0 = 0x00;
P4M1 = 0x00;
P5M0 = 0x00;
P5M1 = 0x00;
}
那个pwm初始化的代码我把那两行P2M0 &= ~0x0e;
P2M1 &= ~0x0e;注释掉换成下面的的// P2M0 |= 0x0E;// P2.1 P2.2 P2.3 → M0=1
//P2M1 &= ~0x0E; // P2.1 P2.2 P2.3 → M1=0还是没有用，上传的图片中0.87v是p2.1引脚输出的电平，另外一个30mv的是p2.2和p2.3正常输出的低电平，麻烦给个解决方案规避下，否则会对负载的使用寿命造成影响的
1.空板焊接最小系统，对比
2.上传电路图pdf文件
ercircle 发表于 2026-3-30 20:16
1.空板焊接最小系统，对比
2.上传电路图pdf文件
电路原理图不方便上传，请问这个是gpio配置错误导致的问题吗？还是说是硬件设置的这个引脚导致的？我们这边硬工给我换了个引脚暂时没有看到问题了，换到了P2.2引脚去了，就是这一块肯定是要解决的，请问如果在没有enable引脚的时候这个问题应该如何规避？ 今晚打老虎 发表于 2026-3-30 20:28
电路原理图不方便上传，请问这个是gpio配置错误导致的问题吗？还是说是硬件设置的这个引脚导致的？我们这 ...
大概率是板子问题
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