建议扩展特殊功能寄存器地址的排序
本帖最后由 邮箱 于 2024-11-11 13:56 编辑现在扩展特殊功能寄存器地址的排序
#define P0PU (*(unsigned char volatile far *)0x7efe10)
#define P1PU (*(unsigned char volatile far *)0x7efe11)
#define P2PU (*(unsigned char volatile far *)0x7efe12)
#define P3PU (*(unsigned char volatile far *)0x7efe13)
#define P4PU (*(unsigned char volatile far *)0x7efe14)
#define P5PU (*(unsigned char volatile far *)0x7efe15)
#define P6PU (*(unsigned char volatile far *)0x7efe16)
#define P7PU (*(unsigned char volatile far *)0x7efe17)
#define P0NCS (*(unsigned char volatile far *)0x7efe18)
#define P1NCS (*(unsigned char volatile far *)0x7efe19)
#define P2NCS (*(unsigned char volatile far *)0x7efe1a)
#define P3NCS (*(unsigned char volatile far *)0x7efe1b)
#define P4NCS (*(unsigned char volatile far *)0x7efe1c)
#define P5NCS (*(unsigned char volatile far *)0x7efe1d)
#define P6NCS (*(unsigned char volatile far *)0x7efe1e)
#define P7NCS (*(unsigned char volatile far *)0x7efe1f)
#define P0SR (*(unsigned char volatile far *)0x7efe20)
#define P1SR (*(unsigned char volatile far *)0x7efe21)
#define P2SR (*(unsigned char volatile far *)0x7efe22)
#define P3SR (*(unsigned char volatile far *)0x7efe23)
#define P4SR (*(unsigned char volatile far *)0x7efe24)
#define P5SR (*(unsigned char volatile far *)0x7efe25)
#define P6SR (*(unsigned char volatile far *)0x7efe26)
#define P7SR (*(unsigned char volatile far *)0x7efe27)
#define P0DR (*(unsigned char volatile far *)0x7efe28)
#define P1DR (*(unsigned char volatile far *)0x7efe29)
#define P2DR (*(unsigned char volatile far *)0x7efe2a)
#define P3DR (*(unsigned char volatile far *)0x7efe2b)
#define P4DR (*(unsigned char volatile far *)0x7efe2c)
#define P5DR (*(unsigned char volatile far *)0x7efe2d)
#define P6DR (*(unsigned char volatile far *)0x7efe2e)
#define P7DR (*(unsigned char volatile far *)0x7efe2f)
#define P0IE (*(unsigned char volatile far *)0x7efe30)
#define P1IE (*(unsigned char volatile far *)0x7efe31)
#define P2IE (*(unsigned char volatile far *)0x7efe32)
#define P3IE (*(unsigned char volatile far *)0x7efe33)
#define P4IE (*(unsigned char volatile far *)0x7efe34)
#define P5IE (*(unsigned char volatile far *)0x7efe35)
#define P6IE (*(unsigned char volatile far *)0x7efe36)
#define P7IE (*(unsigned char volatile far *)0x7efe37)
#define P0PD (*(unsigned char volatile far *)0x7efe40)
#define P1PD (*(unsigned char volatile far *)0x7efe41)
#define P2PD (*(unsigned char volatile far *)0x7efe42)
#define P3PD (*(unsigned char volatile far *)0x7efe43)
#define P4PD (*(unsigned char volatile far *)0x7efe44)
#define P5PD (*(unsigned char volatile far *)0x7efe45)
#define P6PD (*(unsigned char volatile far *)0x7efe46)
#define P7PD (*(unsigned char volatile far *)0x7efe47)
#define P0BP (*(unsigned char volatile far *)0x7efe48)
#define P1BP (*(unsigned char volatile far *)0x7efe49)
#define P2BP (*(unsigned char volatile far *)0x7efe4a)
#define P3BP (*(unsigned char volatile far *)0x7efe4b)
#define P4BP (*(unsigned char volatile far *)0x7efe4c)
#define P5BP (*(unsigned char volatile far *)0x7efe4d)
#define P6BP (*(unsigned char volatile far *)0x7efe4e)
#define P7BP (*(unsigned char volatile far *)0x7efe4f)
建议扩展特殊功能寄存器地址的排序
#define P0PU (*(unsigned char volatile far *)0x7efe10)
#define P0NCS (*(unsigned char volatile far *)0x7efe11)
#define P0SR (*(unsigned char volatile far *)0x7efe12)
#define P0DR (*(unsigned char volatile far *)0x7efe13)
#define P0IE (*(unsigned char volatile far *)0x7efe14)
#define P0PD (*(unsigned char volatile far *)0x7efe15)
#define P0BP (*(unsigned char volatile far *)0x7efe16)
#define P0INTE (*(unsigned char volatile far *)0x7efe17)
#define P0INTF (*(unsigned char volatile far *)0x7efe18)
#define P0IM1 (*(unsigned char volatile far *)0x7efe19)
#define P0IM0 (*(unsigned char volatile far *)0x7efe1a)
#define P0WKUE (*(unsigned char volatile far *)0x7efe1b)
typedef struct
{
u8 PU;
u8 NCS;
u8 SR;
u8 DR;
u8 IE;
u8 PD;
u8 BP;
...
u8 WKUE;
} GPIO_TypeDef;
GPIO_TypeDef far *GPIOP0 = &P0PU;
GPIO_TypeDef far *GPIOP1 = (&P0PU) + xx;
GPIO_TypeDef far *GPIOP2 = (&P0PU) + xx;
GPIO_TypeDef far *GPIOP3 = (&P0PU) + xx;
GPIO_TypeDef far *GPIOP4 = (&P0PU) + xx;
GPIO_TypeDef far *GPIOP5 = (&P0PU) + xx;
GPIO_TypeDef far *GPIOP6 = (&P0PU) + xx;
GPIO_TypeDef far *GPIOP7 = (&P0PU) + xx;
void main()
{
GPIOP0->PU = 0XFF;
while (1);
}
还有很多地方
你那是按端口排序,官网的是按功能排序吧 jwd 发表于 2024-11-11 14:23
你那是按端口排序,官网的是按功能排序吧
是的 确实按端口排序更适合结构体访问,也是各家mcu的通常做法
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