现在需要驱动一个 比例伺服阀 输入要求+-10V 1024分辨率
调这个比较麻烦，还费时，用DAC芯片吧 shaw 发表于 2024-10-6 17:09
现在需要驱动一个 比例伺服阀 输入要求+-10V 1024分辨率
比例伺服阀一般速度较慢，可以使用PWM经过RC滤波得到模拟电压，如果需要较大驱动电流，则使用一个运放缓冲（顺便做2阶低通滤波）可以输出10~20mA的电流，内阻小于0.1欧姆。 本帖最后由 jmg 于 2024-10-21 05:31 编辑
Shennong Ding published on 2024-9-13 09:23
Now PWM can be used to realize DAC, ADC detection feedback control accuracy
There are circuits around that attempt ripple cancellation to improve PWM ripple/response compromise, but the one in EDN comes out virtually identical to fewer parts used in a higher order filter
This from eevblog PWM ripple cancellation.asc
There is a modest improvement in PWM filtering you can get 'for free' (no added parts) and that is to change the second stage RC from a lazy equal-values choice to a lighter loading stage that has less effect on the roll-off
A second stage 4.5 x the resistance of the first, improves rise time ~ 20% better than the more complex ripple cancel, or 35~43% better rise time than the default equal-value RC (or you can choose less ripple)
If your design has a spare opamp, you can get the full improvement in roll-off.
本帖最后由 梁工 于 2024-10-21 14:12 编辑
jmg 发表于 2024-10-21 04:50
There are circuits around that attempt ripple cancellation to improve PWM ripple/response compromis ...
两节无源RC滤波（2阶RC），则RC值最好是PWM周期的10倍以上。
两节RC滤波后输出模拟信号的截止频率fo = 0.05955/RC = 0.06/RC。
实测 RC=1TRC=2TRC=4TRC=8T RC=16T RC=5T RC=10TRC=20T
第一节mV1100 560 280 140 70 224 112 56
第二节mV 140 40 10 2.5 0.6 6.4 1.6 0.4 = 160/N^2
纹波系数 2.8% 0.8% 0.2% 0.05% 0.012% 0.16% 0.04% 0.01%
截止频率 0.06f 0.03f 0.015f 0.0075f 0.00375f 0.012f 0.006f 0.003f =0.06/RC = 0.06*f/N，f为PWM频率
梁工 发表于 2024-10-21 14:11
两节无源RC滤波（2阶RC），则RC值最好是PWM周期的10倍以上。
两节RC滤波后输出模拟信号的截止频率fo =...
That looks only at ripple, for a DAC spec, you should also look at Rise Time.
See the comparison here :
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